Project 4 - 3:2 Adder

The definition of the circuit is if the input is n bits, then the output is n+1 bits long.
But in the template both inputs and outputs are 16 bits, plus the s[n] bit is not constant ‘0’ as described in the circuit definition, while c[0] is.
Shouldn’t the output be 17 bits long, as necessary for it to compute the sum properly?
We need to ignore one of the bits?

Thank you

Full-Adder(i) has inputs a_i,b_i,c_i and outputs:
s_i=a_i ~xor~ b_i ~xor~ c_i, where c_{i+1} is the carry bit that corresponds to the inputs.
Hence s_n=0 and c_n=0 simply because they are not an output of a full adder.
Correctness follows from the fact that each full adder is correct.

Why is Cn a zero?
There may be a carry and the output sum may have another digit (one more than the outputs), am I wrong?