|
Qustion about dlx at the exam
|
|
1
|
373
|
9 July 2020
|
|
A question from moed B 2014
|
|
1
|
290
|
9 July 2020
|
|
Active control outputs for CopyGPR2MDR state
|
|
1
|
398
|
9 July 2020
|
|
Final Exams - recursive implementation
|
|
1
|
343
|
8 July 2020
|
|
Reverse circuit
|
|
1
|
292
|
8 July 2020
|
|
Handout 12 Q3 - unclear transition in the solution
|
|
1
|
306
|
8 July 2020
|
|
Project 5 - question about the addresses in the DLX
|
|
1
|
304
|
8 July 2020
|
|
Question about comp-adder vs conditional sum adder
|
|
0
|
368
|
8 July 2020
|
|
Dlx file - instruction on where and how to write the code
|
|
2
|
329
|
8 July 2020
|
|
Handwriting in the Ipad
|
|
0
|
261
|
8 July 2020
|
|
Lack of Peer Learning in Discourse
|
|
0
|
285
|
8 July 2020
|
|
Project 5 - part 1
|
|
3
|
302
|
7 July 2020
|
|
Practice problems
|
|
0
|
321
|
7 July 2020
|
|
Sequential Adder, Reset Signal
|
|
3
|
343
|
2 July 2020
|
|
HW -12 is not in English
|
|
0
|
343
|
1 July 2020
|
|
Exam 2019 Moed A
|
|
6
|
339
|
29 June 2020
|
|
Project 5-The address of int in the memory dump
|
|
1
|
532
|
25 June 2020
|
|
Project 5 - encoder
|
|
1
|
392
|
25 June 2020
|
|
Project 5, Assembly
|
|
1
|
242
|
25 June 2020
|
|
Project 5 - Assembly
|
|
4
|
330
|
25 June 2020
|
|
Project 5 router 2 inputs with the same address
|
|
3
|
407
|
25 June 2020
|
|
Project 5, Port output
|
|
3
|
337
|
25 June 2020
|
|
Extended "Formula sheet" in the final exam
|
|
1
|
383
|
23 June 2020
|
|
Project 5 part 2
|
|
1
|
529
|
23 June 2020
|
|
Recitation 13 \\ the exercise at the end of the recitation
|
|
2
|
296
|
23 June 2020
|
|
H.W 11 - need a pdf
|
|
0
|
295
|
22 June 2020
|
|
Shifters in project 4
|
|
0
|
311
|
21 June 2020
|
|
Project 4 - part 1 - q4
|
|
3
|
337
|
20 June 2020
|
|
Project 4 part 2 question 1
|
|
0
|
332
|
19 June 2020
|
|
Project 4, part 1: question 3
|
|
0
|
388
|
18 June 2020
|